SLAC Controls Software: Index Panel Vol. 7, No. 7

This special issue of the Index Panel is devoted to the introduction of the new Machine Protection System (MPS).

The new MPS System provides many important features. The most prominent of these include:

The new MPS System is the result of several years of work by many people. Contributers to the MPS project include: Stephanie Allison, Ron Chestnut, Spencer Clark, Mark Crane, Alex Grillo, Tony Gromme, Dave Hamilton, Dave Hutchinson, Karey Krauter, Dave Millsom, Bill Pierce and his MPS Crew, Debra Ohman, Jeff Olsen, Greg Sherwin, Nancy Spencer, Ken Underwood, Daniel Van Olst, Greg White, and Mike Zelazny.

The software essential to the operation of MPS is complete and is described in the following articles. As additional software components are brought online, they will be announced and described in future issues of the Index Panel.

Only a small portion of the accelerator has been wired into the new MPS system. Over the next few months the accelerator will gradually be connected to the new MPS system.

This article is an overview of the MPS System as a whole. Other articles in this issue deal with using the MPS SCP Interface, Faults Display, Algorithm Compiler, and Algorithm Simulator.

An introduction to the new MPS System can be found in the HELP for the MPS System Panel. To get to the MPS System Panel from the main Index panel, go to the MPS PPS ACCESS panel, then to the MPS System Panel. Also available from the MPS System Panel is the MPS Terms Panel, which provides a glossary of common MPS terms and concepts.

MPS System Overview

The purpose of the Machine Protection System (MPS) is to monitor the accelerator on a pulse-by-pulse basis for damaging (or potentially damaging) conditions and to adjust the machine rate accordingly.

There are several important components of the MPS System: APs, the MPG, algorithms, 1553 modules, SLC Micros; the MPS Controller, Event Managers, and the SCPs.

APs (short for ``algorithm processor''; a new VME-based micro) process data from devices monitoring an area of the accelerator. The APs control the MPG on a pulse-by-pulse basis, and thus control the pulse rate of the accelerator. (See ``AP'' on the MPS Terms Panel for more information.)

APs process their data using an ``algorithm''. An algorithm is basically a table that describes the rate that the AP should request for different sets of circumstances. Algorithms are written in a special language by experts who are extremely knowledgeable about the accelerator. A simulator is available to test algorithm logic by using device states specified by the user. (See ``algorithm'' on the MPS Terms Panel for more information.)

New CAMAC modules (known as ``1553 modules'') monitor devices that check for dangerous machine conditions. 1553 modules have a special connector that most CAMAC modules do not have. This connector allows APs to get the current device states. (See ``module, 1553'' and ``device'' on the MPS Terms Panel for more information.)

The characteristics of 1553 modules (including filter time, polarity, trip level, etc.) are not ``hard-wired'' and may be modified by the MPS Controller (see below) via virtual CAMAC commands. Setting the characteristics of 1553 modules is referred to as ``configuration''. (See ``configure, module'' on the MPS Terms Panel for more information.)

The MPS Controller process on the VAX functions as a ``central coordinator'' for the MPS System. It maintains system integrity by periodically checking the health of the networks, APs, VAX processes, SLC micros, and 1553 modules that make up the MPS System. It also is responsible for performing MPS control requests made by the SCPs, so that conflicting or inconsistent user requests are rejected. (See ``Controller, MPS'' on the MPS Terms Panel for more information.)

The SLC Micros monitor the configuration of 1553 modules. If a 1553 module's configuration does not match the settings specified in the SLC database, the SLC Micro sends a message to the MPS Controller. The MPS Controller can then take appropriate actions.

There exists a VAX process for each AP, known as an Event Manager. Each AP sends its device data to its Event Manager on the VAX when it has spare time. Each Event Manager processes its AP data by the same method as its AP, but more extensively, and makes this information available to SCPs, the fault accounting process (BPACOUNT,) and the MPSFAULT CUD process. Event Managers do not control the MPS System; rather, they exist to make MPS fault and trip information available for users on the VAX.

The SCPs do not control the MPS System directly. Rather, the SCPs send their control requests to the MPS Controller. The MPS Controller requires a password for some potentially destructive controls; if it requires such a password, the SCP will automatically prompt the user. (See ``passwords, MPS'' on the MPS Terms Panel for more information.)

The SCPs also provide numerous displays that interpret data from the SLC Database, MPS Controller, and Event Managers.

References

The focus of these Index Panel articles is on the user interface. The following documents provide more information on the requirements, design, and implementation of new MPS:

A. Grillo, et al., ``Software Specification for the New Machine Protection System'', May 1991, DOC$MPS:MPS_SOFTWARE_REQUIREMENTS.DVI. A. Grillo, et al., ``MPS System Software High Level Design'', June 1991,
DOC$MPS:MPS_HIGHLEVEL.DVI. S. Clark, et al., ``Smart Machine Protection System'', November 1991, SLAC-PUB-5688. K. Krauter and M. Crane, ``MPS Beam Control Software Architecture'', April 1993, SLAC-PUB-6149. S. Allison, et al., ``MPS VAX Monitor and Control Software Architecture'', April 1993, SLAC-PUB-6155. G. White and G. Sherwin, ``Machine Protection System Algorithm Compiler and Simulator'', April 1993, SLAC-PUB-6159. M. Crane, et al., ``AMS: Area Message Service for SLC'', April 1993, SLAC-PUB-6166. LDIM and PIC Hardware Specifications, DOC$HARDWARE:LDIMSPEC.MEM and
PICSPEC.DOC.

MPS Hardware

The new Machine Protection System (MPS) is based on Motorola M68K series micro processors executing on Single Board Computers (SBC) housed in VME bus crates. There are currently two of these VME crates used for the E143 run. The MPS Supervisor (SUPE) micro SP00, is located in MCC rack 301. The Algorithm Processor (AP) is AP01 and is located in MCC rack 204. The SBCs used are a single 6U VME bus card which includes the processor, co-processor, 4 or 8 megabytes of memory, ethernet controller, serial i/o ports, and various other processor support modules and i/o capabilities. The micros communicate to the MCC/SLC VAX cluster via the LEBnet ethernet for IPL, status, and control information. Communications between the APs themselves and the CAMAC based data acquisition hardware is via MIL-1553B connections. MIL-1553B is a one megahertz, low protocol overhead, serial communications protocol used in time critical applications. Communications between the SUPE AP and the Master Pattern Generator (MPG/MP00) is via a shared memory interface, VME bus to Multibus.

pSOS+ from Integrated Systems is the Real Time Operating System (RTOS) used on the micros. The RTOS software provides an operating system, multitasking scheduler, networking support, input/output, and debugging support for the system. The MPS application code is layered on top of this RTOS to complete the system. The MPS code is cross developed on the VAX cluster and then loaded into the micros for execution. Debugging is accomplished over the network using a cross-debugger running on the VAX cluster.

Two new CAMAC modules have been developed for the MPS project plus one more to be released soon. The Protection Ion Chamber (PIC) module is a dual width CAMAC module which provides five channels of ion chamber inputs. Each input is sampled, digitized, and compared to configurable ``trip" points to determine levels of radiation at the source. These trip states are available at a single MIL-1553B port per module. Raw data and configuration information is available at the CAMAC interface. The Latching Digital Input Module (LDIM) is a single width CAMAC module which provides 32 channels of input data. The basic operational mode of the LDIM is like the IDIM with some additional features. The digital data is available at a single MIL-1553B port. Raw data, latched data, and configuration commands are available at the CAMAC interface. Soon to be available is the Resistor Temperature Detectors (RTD) module. This module is much the same as the PIC module execpt that the input section measures two/four wire voltage differences where the PIC module measures microamp current levels.

SCP Support for New MPS System

Following is a description of the SCP controls and displays in support of the new MPS System. (Refer to the ``New MPS System'' article in this issue if you are unfamiliar with the New MPS System).

The SCP now supports nearly all MPS controls and displays (with the exception of the MPS Algorithm Compiler and the MPS Simulator, which are available offline).

The main panel for the new MPS System is the MPS System Panel. To get to the MPS System Panel, go to the MPS PPS Access Panel from the main index; then select the MPS System Panel.

The panels for the new MPS System contain extensive documentation; every button has HELP. In addition, the MPS Terms Panel (available from the MPS System Panel) contains definitions for new MPS terms and concepts. This Index Panel article does not contain all of the information available from the SCP; instead, it describes the new MPS features available on the SCP, and provides an overview of the most important MPS Panels and the buttons each contains.

MPS Features on the SCP

Many MPS controls on the SCP will prompt you for one of several passwords before submitting your request. This helps to ensure that only authorized people perform potentially dangerous actions. (See ``passwords, MPS'' on the MPS Terms Panel).

Users may control the state of the entire MPS System. Possible states for MPS include OFF, SAMPLE, COMPUTE, and ON. The MPS system only permits beam in the ON state. (See ``state, MPS system'' on the MPS Terms Panel).

Users may bypass both APs and devices on the MPS System. Bypassing makes a device ``look like'' it is at a state different than its actual state. Bypassed devices or APs are visible from several displays. (See ``bypass'' on the MPS Terms Panel).

Users can send a new algorithm to an AP; also, the names and contents of algorithms in use by APs are displayable from the SCP. The names and contents of algorithms that are available for future downloading are also displayable from the SCP. (See ``algorithm'' on the MPS Terms Panel).

However, algorithms must be written and edited offline; this cannot be done from the SCP. Algorithms must also undergo a process known as ``compilation'' which checks for syntax errors and other problems; the output of compiling an algorithm is a file that an AP can understand.

Users may IPL crashed APs. They may also set an AP offline to halt communications with the AP for hardware repairs or replacement.

1553 modules that are used (or could potentially be used) by the MPS System may be re-configured if they lose their settings, or may be configured to new settings. (See ``module, 1553'' on the MPS Terms Panel).

Displays are available that show the current messages, warnings, and errors in effect for the entire MPS system. There are also displays that show faults (devices that are reducing the machine rate) for a specific BGRP. The status of the APs and VAX Processes that make up the MPS System are also visible from a SCP display. (See ``fault'' on the MPS Terms Panel).

Devices which are, or could be, used in an algorithm are visible from several different displays, depending on the nature of the information required. (See ``device'' on the MPS Terms Panel).

MPS Panel Overview

Each MPS Panel is designed for controlling or displaying a specific type of object in the MPS System. For example, there is a panel for APs, one for devices, and one for the entire MPS System.

There is no ``geographical'' division of panels. Instead, buttons at the bottom of most MPS panels allow selection of all controls and displays. (For example, the single MPS Device Panel described below allows devices to be selected from any part of the accelerator, rather than having a large collection of MPS Device Panels to search though, one for each area of the accelerator).

In general, the panels for the New MPS System tend to have this layout: Panel selection: upper left of panel. Paging and printing: upper right of panel. Controls: middle left of panel. Displays: middle right of panel. Selections for controls and displays: bottom of panel.

This is the main panel for the MPS System. It may be selected from the MPS PPS Access panel (available from the main Index).

This panel contains the most commonly used controls that affect the entire MPS system. It also contains the most commonly used displays that give information for the entire MPS system. Most of the other important new MPS Panels can be selected from this panel.

VAX Beam Permit Off: Remove the VAX Beam Permit. VAX Beam Permit On: Reinstate the VAX Beam Permit. Change MPS State: Set the MPS System State. Start System Verify: Perform verification on all APs, CAMAC.

Statuses shown on this panel include: VAX Beam Permit Status: Show status of VAX Beam Permit. Supervisor Beam Permit Status: Show status of Supervisor Beam Permit Deadman Beam Permit Status: Show status of Deadman Beam Permit.

MPS Network Display: Show MPS VAX processes and APs with status. System Database Display: Show MPS database information. System Summary Display: Show messages, warnings, errors for MPS.

This panel is used to obtain HELP about an MPS term or concept. It is available from the MPS System Panel.

The MPS Terms Panel functions much like the phone list at the bottom of the Index Panel. Just select the first (and second, if desired) letters of the term desired.

This panel contains the most commonly used controls that affect one or more APs. It also contains the most commonly used displays that give information on the APs. This panel can be selected from the MPS System Panel.

Most controls and displays on this panel perform their function upon the selected AP. Use the buttons at the bottom of the panel to select an AP.

Verify AP: Perform checks to ensure integrity of an AP in MPS system. IPL AP: Reset AP Hardware, download image, and ready AP for operation. Bypass AP: Override rate requested by AP. Unbypass AP: Cancel an existing AP bypass. Extend AP bypass: Extend the expiration time of an existing AP bypass.

MPST Display: Show MPS stoppers in MPST and non-MPST format. (See ``stopper, MPS'' and ``MPST'' on the MPS Terms Panel). AP Bypass Display: Show information on selected bypassed APs. ALL* AP Bypass Display: Show information on ALL bypassed APs. AP Bypassed Devices Display: Show info on bypassed devices for selected AP. ALL* AP Bypassed Devices Display: Show info on bypassed devices for ALL APs. AP DB Display: Show database information for AP.

This panel contains controls and displays that involve APs and their algorithms. This panel can be selected from the AP Control Panel (available from the MPS System Panel).

Some controls and displays on this panel perform their function upon the selected AP; other controls and displays perform their function upon the selected reference algorithm. (For more information on the terms ``reference algorithm'' and ``downloaded algorithm'', see ``algorithm'' on the MPS Terms Panel).

Users should utilize the buttons at the bottom of the panel to select an AP, and the ``Select RefAlg Filnam'' button to select a reference algorithm. The buttons on this panel have HELP behind them that explains which entity the button uses.

Download New Algorithm to AP: Force an algorithm down to an AP. Change Algorithm Check Expiration Time: Set halt time if an algorithm mismatch occurs. Select Reference Algorithm Filename: Set reference algorithm for displays.

Reference Algorithm Directory Display: Show all reference algorithms. Reference Algorithm Listing Display: List selected reference algorithm. Downloaded Algorithm Directory Display: Show downloaded algorithm for AP(s). Downloaded Algorithm Listing Display: List download algorithm contents. AP Port Display: Show all ports/devices referenced by AP's algorithm.

This panel contains displays that give information on the MPS status of specific BGRPs.

The most important display on this panel (the Faults Display) creates its display for the selected BGRP and AP(s). Use the buttons at the bottom of the panel to first select a BGRP, then an AP.

The Faults Display is one of the most important MPS displays on the SCP. It shows if a BGRP is running at its optimum rate, and if not, it details exactly why. (For more information on the Faults Display, see the article later in this issue entitled ``MPS Faults Display'').

Faults Mode: Toggles the Faults Display to show REAL, HIDDEN, or ALL. Display Mode: Toggles the Faults Display TERSE or FULL mode.

Faults display: Shows faults for the selected BGRP and manager. MPS Network Display: Show MPS VAX processes and APs with status. System Summary Display: Show messages, warnings, errors for MPS.

This panel contains controls and displays that involve MPS protected digital devices. (The algorithm compiler only permits certain MPS protected devices in algorithms. See ``protected, MPS'' on the MPS Terms Panel.) This panel can be selected from the MPS System Panel.

Most controls and displays on this panel perform their function upon the selected device. Use the buttons at the bottom of the panel to select a device.

To use controls and displays that involve the MPS protected modules that implement MPS protected devices, go to the MPS Module Panel.

To use controls and displays that involve digital devices that are not protected by the MPS System, go to the CAMAC Device Panel.

Micro CAMAC Verify: Check configuration of all 1553 modules in micro. Configure Device Modules: Configure all 1553 modules for the selected device to ``old'' values. Configure Device Modules to New Values: Configure all the 1553 modules for the selected device to ``new'' values. Bypass Device: Override state of a device. Unbypass Device: Cancel an existing device bypass. Extend Bypass Device: Extend the expiration time of an existing device bypass.

Device Display: Show info on selected devices. Device Bypass Display: Show info on selected devices that are bypassed. ALL* Device Bypass Display: Show info on ALL devices that are bypassed.

This panel contains controls and displays that involve 1553 modules that contain one or more MPS protected channels. (See ``protected, MPS'' on the MPS Terms Panel.) This panel can be selected from the MPS Device Panel (which is available from the MPS System Panel).

Most controls and displays on this panel perform their function upon the selected 1553 module channel. Use the buttons at the bottom of the panel to select a 1553 module channel.

To use controls and displays that involve MPS protected devices, go to the MPS Device Panel.

To use controls and displays that involve 1553 modules that contain one or more channels unprotected by the MPS system, go to the CAMAC Module Panel.

Micro CAMAC Verify: Check configuration of all 1553 modules in micro. Configure Modules: Configure 1553 modules to ``old'' values. Configure Modules to New Values: Configure 1553 modules to ``new'' values.

This panel contains less frequently used controls that affect the entire MPS system. It also contains less frequently used displays that give information for the entire MPS system. This panel can be selected from the MPS System Panel.

This panel contains less commonly used controls that affect one or more APs. It also contains less commonly used displays that give information on one or more APs. This panel can be selected from the AP Control Panel (which can be selected from the MPS System Panel).

This panel contains additional CUD Displays for the MPS System. (See HELP on the main CUD Panel for background information on using the CUD facility). This panel can be selected from the CUD Panel (which can be selected from either the MPS System Panel or the Special Displays Panel).

This panel contains CUD displays that users may place on a CUD Monitor. The ten CUD displays, MPS01-MPS10, equate to active BGRPs. To see which BGRP each CUD MPSFAULT display currently shows, use the ``SHOW CUDMPS INFO'' display on this panel.

The CUD MPSFAULT displays are basically much like the Faults Display on the MPS BGRP Panel. (See the article later in this issue entitled ``MPS Faults Display'').

The CUD MPSFAULT displays are fixed in TERSE display mode and in the ALL faults mode. The CUD MPSFAULT displays shorten some information more than the Faults Display on the SCP and can only display a limited amount of information. If a CUD MPSFAULT display overflows or an abbreviation is not clear, use the Faults Display on the SCP, on the MPS BGRP panel.

In addition, the CUD MPSFAULT displays show faults slightly more promptly than the Faults Display on the SCP.

MPS Faults Display

The MPS Faults Display allows users to see at a glance the overall MPS status of a BGRP. This display should help users quickly pinpoint the cause when a BGRP is not running at its optimal rate, and in some cases help prevent rate-limiting situations before they occur.

The following information is shown on the MPS Faults Display: Errors, warnings, and messages that could affect the rate of any BGRP monitored by MPS; the MPG rate that the supervisor is requesting for the BGRP; the actual rate that the MPG is issuing for the BGRP; a summary of the MPS Stopper positions; APs that are preventing the supervisor from requesting the optimal rate for the BGRP (if any); Devices that are preventing the APs from requesting the optimal rate for the BGRP (if any).

(Be sure to read the ``New MPS System'' article in this issue. it provides background information for this article. In addition, it may be helpful to see ``fault'' on the MPS Terms Panel).

The MPS Faults Display is located on the MPS BGRP Panel. (To get to the MPS BGRP panel from the main index, go to the MPS PPS ACCESS panel; then to the New MPS System panel; and finally to the MPS BGRP panel).

Several CUD Displays also exist that show a shortened version of the Faults display. See the HELP on the CUD MPS panel for more information.

Before using the Faults Display, the user must select a BGRP and an AP at the bottom of the panel (ALL* is the usual selection for the AP). The user may also wish to toggle the ``Display Mode'' and ``Faults Mode'' buttons (see below for more information).

Display Description

This is an example of the Faults Display. The header for the display shows that the display is for the BGRP SLCSLD and all APs; the Display Mode is TERSE and the Faults Mode is ALL.

 
 +-----------------------------------------------------------------------+ 
 |                         MPS FAULTS DISPLAY                            |
 |   DISPLAY MODE: TERSE, BGRP: SLCSLD, AP: ALL*, FAULTS MODE:    ALL    |
 |                                                                       |
 |                     SYSTEM MESSAGES AND ERRORS:                       |
 |                     ---------------------------                       |
 |  MPS HSTA: ON                                            INFO         |
 |  MPS STAT: GOOD                                          INFO         |
 |                         BGRP INFORMATION:                             |
 |                         -----------------                             |
 |  REQUEST: ZERORATE (0 Hz everywhere)                                  |
 |  CURRENT: ZERORATE (0 Hz everywhere)                                  |
 |  STOPPER: ALL STOPPERS OUT                                            |
 |                                                                       |
 | SUPERVISOR FAULTS:                                                    |
 |   #  AP:  PRIM MICR UNIT COMPONNT CURSTATE FAULT INFORMATION:         |
 |  --- ---- ---- ---- ---- -------- -------- ---------------------- --- |
 |      SP00 ALPR AP01    1 REQ_RATE ZERORATE Currently Faulted          |
 |      SP00 ALPR AP02    1 REQ_RATE LIMIT_HI Currently Faulted          |
 | AP FAULTS:                                                            |
 |   #  AP:  PRIM MICR UNIT COMPONNT CURSTATE FAULT INFORMATION:         |
 |  --- ---- ---- ---- ---- -------- -------- ---------------------- --- |
 |   Faults at ZERORATE:                                                 |
 |      AP01 MPS  AB01   20 40IC     TRIP     Currently Faulted          |
 |   Faults at LIMIT_HI:                                                 |
 |      AP02 MPS  AB02   20 IC1      TRIP     Currently Faulted          |
 +-----------------------------------------------------------------------+

The Faults Display consists of two main portions, shown in the example as ``SYSTEM MESSAGES AND ERRORS'' and ``BGRP INFORMATION''.

This portion of the display shows messages, warnings, and errors from the MPS System. It contains information unrelated to a specific BGRP, and is basically the same as the System Summary Display. Changes to the selected BGRP or AP do not affect this portion of the Faults Display. In this example, the only messages are the MPS System HSTA and STAT.

This portion of the display only shows information for the selected BGRP. It allows users to first see the BGRP rate, then to see why the supervisor is requesting that rate, and lastly to see why the APs are requesting that rate from the supervisor.

The BGRP Information portion of the Faults Display first shows the rate that the supervisor is requesting, the current rate issued by the MPG for the BGRP, and the current configuration of the MPS Stoppers. In the example above, the supervisor is requesting a rate of ZERORATE for SLCSLD; the current rate being issued by the MPG is ZERORATE; and all MPS stoppers are out.

The faults in the BGRP Information divide into two sections, one for supervisor faults and one for AP faults. The supervisor section shows APs that are preventing the supervisor from requesting the best rate for the BGRP. The AP section shows the devices that are preventing APs from requesting the best rate for the BGRP.

The supervisor and AP sections subdivide into subsections based on rate. Faults in a particular rate subsection ``keep'' their AP at that rate. ``Worse'' rate subsections come before ``better'' ones, thus making APs or devices that are causing more of a problem to be more obvious.

In the example above, the supervisor subsection shows AP01 requesting a rate of ZERORATE and AP02 requesting a rate of LIMIT_HI. AP01 is a ``worse'' fault, so it is shown first. In the AP subsection, MPS AB01 20 40IC is faulted in AP01, causing it to request ZERORATE; also, MPS AB01 20 IC1 is faulted in AP02, causing it to request a rate of LIMIT_HI. Note that MPS AB01 20 40IC is shown before MPS AB01 20 IC1 because it is forcing the BGRP SLCSLD to ZERORATE; MPS AB01 20 IC1 by itself would only lower the rate to LIMIT_HI.

Display Controls

There are several controls for adjusting the nature or amount of information on the MPS Faults Display: the Display Mode, the Faults Mode, and the currently selected AP.

In TERSE display mode, the Faults Display shows the primary-micro- unit-component designation of the faulted device. It also shows the number of times that the device went from a good-to-bad state since the last refresh (only shown if greater than 1); the current state of the device as used in the algorithm evaluation (note that if a device is bypassed, the bypass state overrides the actual state for the algorithm evaluation); and additional fault information that describes why the fault occurred (see below).

The FULL display mode includes everything in the TERSE display mode. In addition, the FULL display mode shows the alias name and the translation for each fault. (The alias name is a string from the database describing the device. The translation is a longer name for the fault supplied by the algorithm.)

The Faults Mode control can be toggled to REAL, HIDDEN, or ALL. A fault must have fault information that matches the current faults mode to appear on the display. (Fault information is a characteristic that each fault has; it describes a little bit about why the device faulted).

The REAL faults mode only shows faults that keep the selected BGRP from running at its optimal rate. Types of fault information that appear as REAL faults can be seen on the HELP behind the Faults Display button on the MPS BGRP panel.

The HIDDEN faults mode only shows faults that do not currently keep the BGRP from running at its optimal rate, but could do so in the future if users take certain actions. They represent potential faults. (The most common example of a HIDDEN fault is a fault that is downstream of an MPS Stopper that is in). Types of fault information that appear as HIDDEN faults can be seen on the HELP behind the Faults Display button on the MPS BGRP panel.

The selected AP can also be used to affect the number of faults that are shown. Only faulted devices that are affecting the selected AP(s) are shown on the MPS Faults Display.

MPS Algorithm Compiler

An MPS algorithm provides a description of the procedure an MPS Algorithm Processor (`AP') must go through in order to determine which repetition rate the SLC can safely run at. MPS Algorithm Processors are micros in the SLC accelerator which are dedicated to running these algorithms in real time for the MPS task. MPS algorithms are written in a language and their development is very like developing computer programs. The algorithm is written in a ``source'' file and translated to binary using the MPS compiler (MPSL).

After a successful compilation, the algorithm can be used in a test bed environment using the MPS Algorithm Simulator. At that stage, the algorithm can be used with fake SLC operating conditions, and exercised through any number of scenarios. If the algorithm is found to need further work, the source file can be edited and recompiled, and the amended binary files can be retested on the simulator.

After the user is satisfied that the algorithm logic is correct, the binary file created by the MPSL compiler can then be moved to production and downloaded to its corresponding AP using the MPS SCP interface.

A user guide to the algorithm compiler can be printed with the following command:

MPS Algorithm Simulator

The intent of the MPS Algorithm Simulator (MPSAS) is to verify that a recently developed MPS algorithm will properly perform as intended. To accomplish this, software simulates virtual devices and their trip conditions to verify that the algorithm performs according to design. Beam groups, rate-limiting kinds, and stopper configurations are also simulated as inputs. The MPSAS tests the software integrity of the algorithms by providing the capability to simulate any possible state of the accelerator and its associated MPS hardware devices. The algorithm verification process is accomplished by comparing the simulator output for a given configuration, which includes requested beam rates and fault information, with the desired results for that configuration.

Author: MPS Team	Subsystem: SLC	User Impact: Large
Panel Changes: Many	Documentation: Yes	Help File: Yes

Author: Mark Crane	Subsystem: SLC	User Impact: Large
Panel Changes: None	Documentation: Yes	Help File: No

Author: Daniel Van Olst	Subsystem: MPS	User Impact: Huge
Panel Changes: Many	Documentation: Yes	Help File: Yes

Author: Daniel Van Olst	Subsystem: MPS	User Impact: Moderate
Panel Changes: Some	Documentation: No	Help File: Yes

Author: Greg White	Subsystem: SLC	User Impact: Small
Panel Changes: None	Documentation: Yes	Help File: No

Author: Greg Sherwin	Subsystem: SLC	User Impact: Small
Panel Changes: None	Documentation: Yes	Help File: No

Contents of Vol. 7, No. 7

New MPS System